Intel Broadens FPGA Vary with New Merchandise Throughout All Six FPGA Platforms #Imaginations Hub

Intel Broadens FPGA Vary with New Merchandise Throughout All Six FPGA Platforms #Imaginations Hub
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Intel’s Programmable Options Group (PSG) is broadening its FPGA product vary with the introduction of six new programmable platforms geared toward various kinds of prospects and workloads. Along with a brand new sub-family of Agilex 5-series choices, Intel is launching its all-new Agilex 3 sequence choices together with new Agilex.

The spotlight of immediately’s announcement is the Intel Agilex 3 FPGA sequence of energy and cost-optimized FPGAs in compact kind elements. The household consists of the Agilex 3 B-series FPGAs that boast the next I/O density in compact kind elements (in comparison with Intel Max 10 FPGAs) and are optimized for board and system administration, together with server platform administration functions. 

On the opposite facet of the Agilex 3 spectrum is the C-series FPGAs which can be engineered to offer supplementary capabilities, making them apt for a broad spectrum of complicated programmable logic units (CPLD) and FPGA functions throughout varied industries. Intel says that its Agilex 3-series FPGAs can be obtainable quickly with out disclosing when precisely.

One other noteworthy introduction is the Intel Agilex 5 FPGA E-series based mostly on the twond Technology Hyperflex FPGA structure and tailor-made for embedded edge functions and subsequently that includes excessive efficiency effectivity. Intel produces these FPGAs in home utilizing its Intel 7 manufacturing know-how (previously generally known as 10 nm Enhanced SuperFin), which is why it says that these components ship 1.6 occasions larger efficiency per watt in comparison with competing FPGAs made on a 16 nm-class course of know-how (probably referring to Xilinx’s FPGAs constructed on this course of node). Moreover, this FPGA sequence integrates an AI tensor block, a function beforehand unique to Intel’s premium programmable components, positioning it as an answer for edge AI duties. Intel will begin sampling Agilex 5 E-series components with design software program in Q1 2024. A system simulator for these FPGAs can be obtainable within the cloud in late 2024.

Intel additionally stated that it had begun shipments of its Intel Agilex 7 FPGAs with the R-Tile chiplet. These FPGAs provide a PCIe 5.0 interface with the CXL protocol on high that enable to rapidly deploy programmable accelerators for particular duties that may profit from larger bandwidth and decrease latencies.

Along with revealing new FPGAs, Intel additionally stated that the primary business product based mostly on its F2000X infrastructure processing unit platform is now transport. The half is the Napatech F2070X IPU that has two 100 GbE ports and is powered by the Agilex AGFC023 FPGA and an Intel Xeon D SoC.

Rounding off the brand new introductions is the Nios V/c compact microcontroller, which is a soft-core IP, based mostly on the RISC-V structure, which could be programmed utilizing the corporate’s Quartus Prime Professional software program.


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